By Shunpei Yamazaki, Masahiro Fujita
This ebook describes the appliance of c-axis aligned crystalline In-Ga-Zn oxide (CAAC-IGZO) expertise in large-scale integration (LSI) circuits. The purposes contain Non-volatile Oxide Semiconductor Random entry reminiscence (NOSRAM), Dynamic Oxide Semiconductor Random entry reminiscence (DOSRAM), relevant processing unit (CPU), field-programmable gate array (FPGA), picture sensors, and and so on. The e-book additionally covers the machine physics (e.g., off-state features) of the CAAC-IGZO box influence transistors (FETs) and technique know-how for a hybrid constitution of CAAC-IGZO and Si FETs. It explains an exceptionally low off-state present know-how used in the LSI circuits, demonstrating diminished strength intake in LSI prototypes fabricated via the hybrid approach. an additional books within the sequence will describe the basics; and the explicit software of CAAC-IGZO to liquid crystal display and OLED monitors.
Key good points:
• Outlines the physics and features of CAAC-IGZO FETs that give a contribution to favorable operations of LSI units.
• Explains the applying of CAAC-IGZO to LSI units, highlighting attributes together with low off-state present, low energy intake, and ideal cost retention.
• Describes the NOSRAM, DOSRAM, CPU, FPGA, photo sensors, and etc., touching on prototype chips fabricated via a hybrid technique of CAAC-IGZO and Si FETs.
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Extra resources for Physics and Technology of Crystalline Oxide Semiconductor CAAC-IGZO : Application to LSI
In imaging sensors, the low leakage current of CAAC devices allows high‐performance global shuttering and on‐sensor image processing to be realised, bringing new capabilities to the devices. The volume concludes with an overview of further application fields, including RF tags, X‐ray imaging and CODEC systems. The authors and editors bring to their subject an outstanding breadth of expertise in the research and development of CAAC‐IGZO materials, devices and systems, and their account of the subject should provide a definitive source for those seeking to understand and exploit the impact of this developing technology on modern electronics.
95 Cross-sectional STEM image of a prototype with two CAAC‐IGZO FET layers stacked on Si FET. 4 µm, respectively. The image is retouched by filling voids in the interlayer film. 99 Cross-sectional STEM image of hybrid structure of Si FET with channel length of 65 nm and CAAC‐IGZO FET with channel length of 60 nm (cooperative work with UMC). 4 Memory cell using CAAC-IGZO FET. 7 Block diagram of 1-Mbit NOSRAM module. 8 Circuit diagram of page buffer. 10 Block diagram of 4-level NOSRAM module. 12 Block diagram of 8-level NOSRAM.
20 State transition diagram of normally‐off CPU. 21 Measured waveforms of the 8‐bit normally‐off CPU. 22 Screenshot of retention characteristics after approximately 40 days. 23 Data‐retention characteristics of Type‐A backup FF at 85°C. 24 Block diagram of the 32‐bit normally‐off CPU. 25 Photograph of the 32‐bit normally‐off CPU. 26 (a) Measured waveforms and (b) measured retention time of the first‐stage backup circuit in power gating. 27 (a) Measured waveforms and (b) measured retention time of the second‐stage backup circuit in power gating.