By Lam, Tak-Kei
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Additional info for Boolean circuit rewiring : bridging logical and physical designs
Becker, R. Hahn, U. Sparmann. Structure based methods for parallel pattern fault simulation in combinational circuits. In Proceedings of the European Conference on Design Automation. , pages 497–502. IEEE, 1991. -K. -C. Tang, X. -L. Wu. ECR: A powerful and low-complexity error cancellation rewiring scheme. ACM Transactions on Design Automation of Electronic Systems, 17(4):50:1–50:21, 2012. ISSN: 1084-4309. 2348854. -C. -Y. Wang. Rewiring using IRredundancy removal and addition. In Design, Automation Test in Europe Conference Exhibition, 2009.
Pages 497–502. IEEE, 1991. -K. -C. Tang, X. -L. Wu. ECR: A powerful and low-complexity error cancellation rewiring scheme. ACM Transactions on Design Automation of Electronic Systems, 17(4):50:1–50:21, 2012. ISSN: 1084-4309. 2348854. -C. -Y. Wang. Rewiring using IRredundancy removal and addition. In Design, Automation Test in Europe Conference Exhibition, 2009. , pages 324 –327, April 2009. P. Maidee and K. Bazargan. A generalized and unified SPFD-based rewiring technique. In Field Programmable Logic and Applications, 2007.
Chang and M. Marek-Sadowska. Who are the alternative wires in your neighborhood? (alternative wires identification without search). In Proceedings of the 11th Great Lakes Symposium on VLSI, GLSVLSI ’01, pages 103–108, New York, 2001a. ACM. ISBN: 1-58113-351-0. 368880. -W. Chang and M. Marek-Sadowska. Single-pass redundancy-addition-and-removal. In Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on, pages 606–609, 2001b. 968723. S. C. Chang and M. Marek-Sadowska. Perturb and simplify: multilevel Boolean network optimizer.